@Houl Also the #MOS6502 and it's successors like #65C02 & #65C816 have several key advantages:

- swappable & upgradeable RAM
- swappable & upgradeable Storage
- Expansion buses!

https://en.wikipedia.org/wiki/WDC_65C816
https://github.com/X16Community/x16-docs

And I too don't think that it makes sense to choose a #Z80 over a #65c02...

https://youtu.be/nyByDNQuMMI?t=2261

Introducing CERBERUS 2100™, the next step in expandable multi-CPU 8-bit systems #Z80 #65C02 - https://youtu.be/qViSKIDjwJY

An (Almost) Single-Chip Apple IIe https://hackaday.com/2022/12/23/an-almost-single-chip-apple-iie/ #Retrocomputing #computerhacks #Apple//e #Apple2 #65c02 #apple

An (Almost) Single-Chip Apple IIe - The Apple II is one of the most iconic microcomputers, and [James Lewis] decided t... - https://hackaday.com/2022/12/23/an-almost-single-chip-apple-iie/ #retrocomputing #computerhacks #apple//e #apple2 #65c02 #apple

Minimalist 6502 System Uses a CPU and not Much Else - A central processing unit, or CPU, is the heart of any computer system. But it’s d... - https://hackaday.com/2022/11/22/minimalist-6502-system-uses-a-cpu-and-not-much-else/ #singleboardcomputer #retrocomputing #computerhacks #breadboard #minimalism #65c02

Minimalist 6502 System Uses a CPU and not Much Else https://hackaday.com/2022/11/22/minimalist-6502-system-uses-a-cpu-and-not-much-else/ #singleboardcomputer #Retrocomputing #computerhacks #breadboard #minimalism #65c02

I'm gonna throw this out there because, if not Mastodon... then where?

Anyone still obsessed with any of the following:

#BBCMicro #Apple1 #Apple2 #Oric #AcornComputers #CommodorePet #6502 #6502 #65C02 #MosTechnology #6502Assembler

#Cerberus2080 - the multiple CPU computer. #65C02, #Z80 and Atmel #AVR. All coexisting at the main board. Picture is from the #DoReCo meeting at the HNF in Paderborn.
#RetroComputing #SBC

About the only thing missing in the ROM monitor for my #65c02 #homebrewcomputer is a way to somehow load and save programs/memory.

Could be interesting to try and implement the Commodore IEC protocol to tap into all the existing drives (incl. SD devices.

But I should probably start simpler like with an existing modem transfer protocol.

Or even simpler with a minimal hand rolled protocol.

Or just use I8HEX despite the bloat as the first stepping stone.

🤔​

That about wraps up the monitor's A (assemble) command, I would say.

#65c02 #homebrewcomputer

Been working on the 'A' ("assemble") command of the ROM monitor of my #65C02 #homebrewcomputer this week, and just unlocked the achievement of being able to assemble all the instructions and addressing modes of the R65C02. 🤓

The remaining stuff (such as automatically continuing at the next address) should be trivial compared to what is now working. Truth be told, I'm not all that happy with the implementation (which ended up being about 500 lines of assembler, incl. directives and a couple of tables specific to this command). I will rewrite it at some point, but for now there is plenty of space in the ROM and my main focus is bootstrapping this system. 😅

Albeit a little cumbersome, now there's actually enough functionality in the monitor to enter and run code!

(And yes, the register dump when returning from calling the entered program shows some wrong values - but that's another story.)

Decent progress with the Disassembly command in the ROM monitor for my #65c02 #homebrewcomputer.

Here is the monitor disassembling the ROM itself. 🤓​

Need to include addresses and data in the output as well, but this shows that the meat of the disassembly is working.

Working a little on the ROM monitor for my #65c02 #homebrewcomputer. Here's the first command - a simple memory dump - implemented.

Rev. 2 PCBs for my #homebrewcomputer arrived, getting rid of some bodge wires and incorporating qualifying the ROM and RAM selects with a delayed φ2 clock, using a DS1010-60 digital delay line.

As I was bringing up the new boards step by step, I thought I was seeing bus contention on the scope with the ROM inserted and running an IO cycle program. 😕​

Couldn't figure out how that could happen, as it only way would be to have the ROM drive the bus at the same time the CPU was writing.

Then I looked at the data line and the ROM /select line and it turns out the notch in the data line signal coincides with the ROM select being deasserted.

So I'll conclude that this is just the inherent capacitance of the bus that's floating the line after the ROM stops driving it, and not in fact a contention scenario. 😅​

#electronics #65c02

When you write a routine to match an arbitrary length command against a list of arbitrary length commands in #65C02 assembly and it works the first time.

Achievement unlocked: ACIA wrangling! 😀​

The test setup is picocom running on a Raspberry Pi 400, connected to the ACIA on the SBC through an FTDI USB-to-serial adapter.

On startup, the SBC successfully transmits the message: SBC#0

After that, the SBC successfully echos back all it receives from the terminal.

The VIA PA LEDs show the ACIA status register, the VIA PB LEDs show the last byte received.

#electronics #65c02 #homebrewcomputer

Think I found the ACIA problem... 😱​

Probing the XTLI and XTLO pins of the ACIA shows a way low and deformed sinusoid at the I pin and a square-ish wave jittering all over the place at the O pin.

I overlooked this in the initial sanity check because I was just using the frequency counter and actually both signals average to the crystal frequency.

#65c02 #homebrewcomputer #electronics

First interrupt test on the #65c02 #homebrewcomputer passing. 🤓​

The VIA Timer 1 has been setup to trigger interrupts every 65536 cycles, and at each timer interrupt a counter is increased and shown on the LEDs attached to PA and PB on the VIA.

#electronics

Attached a row of test LEDs to each of the VIA's ports; a blinkenlights test just seems more satisfying than did confirming the signals on the scope. 🙂​

#65c02 #homebrewcomputer #electronics