There's an RTL-to-GDS toolchain for unattended chip build, called #OpenLane:
https://github.com/efabless/openlane#overview
"OpenLane is an automated RTL to #GDSII flow based on several components including #OpenRoad, #Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization. The flow performs full #ASIC implementation steps from RTL all the way down to GDSII"
See also the videos from #FOSSI
https://www.youtube.com/watch?v=EczW2IWdnOM
#openlane #GDSII #OpenRoad #yosys #asic #fossi