If you have ever used #Tandem computers (K and S-series) when the processor boards had two processors running in lockstep you will be quite pleasantly surprised to read that there's a RISC-V core coming out doing just that:

"On this topic, our Dual-Core Lock-Step demo received all the attention it deserved both at our booth and in the lecture theatre. In 2023, we will make security reference designs available² as the next step in enabling safe and secure custom compute."¹

This is quite interesting in the #SafetyAndReliability space for those who care about these things (#HighReliability, #Automotive, #Avionics, #AerospaceEngineering, etc.).

[Note #1: For those who don't know about "lockstep" the idea is that you have two processors running with the same inputs and from the same buses where the output of operations is verified by a comparison engine to check that they agree on what is going on. If the two processors disagree then the processor board is faulted (simplified description, obviously). This is of great importance where you need to be sure that, say, a stray particle does not bit flip your processor in the midst of something important. It could be argued that, given how crap current software is, this is the least of our problems but you might want to think of it in terms of, say, nuclear power plants, airplanes in the air³, medical equipment, etc.]

[Note #2: I am skeptical about RISC-V, I believe I have already mentioned it, as I am terrified the extension-happy design will bring another Intel-like nightmare of "have you got the correct extension to run X?" along with the dangers of cross-extension interactions.]

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¹ https://codasip.com/2022/12/22/5-things-i-will-remember-from-the-2022-riscv-summit/
² https://codasip.com/press-release/2022/12/12/codasip-launches-securisc5-initiative/
³ yes, the Boeing 737 MAX MCAS is the perfect example of the software (and management) being the issue, not the particle bit flip :flan_sad:​