· @AdaPlanet
72 followers · 2786 posts · Server botsin.space
Computer Engineering JMU · @ce
6 followers · 7 posts · Server mastodon.acm.org

@phf @yosyshq this is the upduino v1 board with (there is even a v3) HW Description (mainly a I2C controller) is done in and synthesis with and itโ€™s ghdl plugin. Place and route is done with . Picture shows floorplan and utilization.

#lattice #ice40 #ghdl #yosys #nextpnr #fpga

Last updated 2 years ago

Interesting details of ieee.fixed_pkg

Today I learned that in order to assign a negative sfixed (signed fixed-point) signal or variable to another signal or variable, I have to use resize.

process
variable x0: sfixed(7 downto -8) := to_sfixed(1, 7, -8);
constant val: sfixed(7 downto -8) := to_sfixed(10, 7, -8);
begin
-- does not work:
x0 := -val;

bowfinger.de/blog/2023/05/inte

#vhdl2008 #fpga #vhdl #ghdl

Last updated 2 years ago

Xasin, Neira & Mesh · @xaseiresh
72 followers · 70 posts · Server fosstodon.org

Ok so it's still a bit buggy on windows, and ModelSim doesn't play nice.

But combined with for open source simulation and for wave viewing it's a surprisingly comfortable to set up tool chain, especially on Linux it's all just via package manager and pip~

Now to learn proper file structuring and documenting habits to raise the code quality bar a bit, probably add proper test benches~
Again helps with built in docs generator <3

#ghdl #vhdl #gtkwave #teroshdl

Last updated 3 years ago

The Last Psion | Alex · @thelastpsion
23 followers · 71 posts · Server bitbang.social

Just noticed that all the have been dropped from the Arch repos. (This probably happened a while back, but I've only just noticed.) However, is in Community.

Before I go and compile ghdl-gcc from source, is it worth me switching to FreeHDL? Bearing in mind that I am very much a noob with and as a whole, although not with .

#linux #digitaldesign #vhdl #freehdl #ghdl

Last updated 3 years ago

screwtape · @screwtape
100 followers · 234 posts · Server mastodon.sdf.org

@havoc hmmm I thought the point of is that the whole language is an appropriate HDL for VHSIC. Do you use at all? Or you're within the AMD demesne aren't you?

Do you think we could make a little lisp inside VHDL for describing trivial circuits? (Not the most appropriate use but it's early days).

#vhsic #hdl #ghdl #vhdl

Last updated 3 years ago

kevin :audio: · @kevin
124 followers · 1168 posts · Server merveilles.town

Anyone know how to convert a vcd to text file?

I'm trying to verify my vhdl program with a python version (which saves the output to a text file), but the best i can seem to get out of to a file is VCD.

I would like to write my own testbenches, simulate with and then view output with but until I can actually figure out how to write a testbench I'm stuck with and quartus prime :(

#gtkwave #ghdl #modelsim #techsupport #vhdl

Last updated 3 years ago