#VHDL #techSupport

Anyone know how to convert a vcd to text file?

I'm trying to verify my vhdl program with a python version (which saves the output to a text file), but the best i can seem to get out of #modelsim to a file is VCD.

I would like to write my own testbenches, simulate with #ghdl and then view output with #gtkwave but until I can actually figure out how to write a testbench I'm stuck with #modelsim and quartus prime :(