Join Dominic Rizzo at 10.00 for his #keynote on #OpenTitan and the past, present, and future of open source secure silicon! #RISCVSummitEurope #zeroRISCInc
Original tweet : https://twitter.com/risc_v/status/1666346756504780805
#zeroriscinc #riscvsummiteurope #opentitan #keynote
.@antmicro adapted the #OpenTitan configuration to fit into a small, accessible @XilinxInc #Artix7 A200T #FPGA, opening the path to synthesizing this #SystemVerilog design with the #opensource #Yosys/UHDM flow. Read more: https://riscv.org/blog/2023/04/adapting-opentitan-for-open-source-fpga-prototyping-and-tooling-development/ @google @chipsalliance
Original tweet : https://twitter.com/risc_v/status/1646134831858819072
#yosys #opensource #systemverilog #fpga #artix7 #opentitan
Curious about @antmicro’s #OpenTitan? Read their #blog to learn more about what it is and how to adapt the OpenTitan design: https://riscv.org/blog/2023/04/adapting-opentitan-for-open-source-fpga-prototyping-and-tooling-development/ #RISCVeverywhere
Original tweet : https://twitter.com/risc_v/status/1645457110862274563
#RISCVeverywhere #blog #opentitan
RT from Antmicro (@antmicro)
Introducing the versatile #openhardware @XilinxInc #Kintex7 K410T #FPGA development board, enabling a variety of #ASIC prototyping scenarios, including testing of designs with multiple IP cores and peripherals, such as #OpenTitan and its variants: https://antmicro.com/blog/2023/03/kintex-k410t-asic-prototyping-board/ @risc_v
Original tweet : https://twitter.com/antmicro/status/1642918779939160068
#opentitan #asic #fpga #kintex7 #openhardware
RT from Antmicro (@antmicro)
Co-simulate CPUs from RTL in #Verilator with @renodeio to run unmodified software in a deterministic simulation. Combine precise CPU models w/ reusable #opensource I/O components to build complete systems simulating e.g. #OpenTitan SoC w/ Ibex @risc_v CPU: https://antmicro.com/blog/2023/01/cpu-rtl-co-simulation-in-renode/
Original tweet : https://twitter.com/antmicro/status/1620833104154836992
#opentitan #opensource #verilator
RT from lowRISC (@lowRISC)
We highlighted our collaborative #OpenTitan project, the world’s first open-source silicon Root of Trust that features our Ibex @risc_v microcontroller, at the #RISCVSummit this year. A special thanks to all who visited us and participated in this event!
Original tweet : https://twitter.com/lowRISC/status/1605262899395469312
One of our silver sponsors, @lowRISC, is attending this year’s #RISCVSummit. Join them to discuss the collaborative #OpenTitan project, the world's first open source silicon root of trust, featuring the hardened Ibex RISC-V microcontroller.
Original tweet : https://twitter.com/risc_v/status/1590773790262398977
RT from Antmicro (@antmicro)
Partnered with @GoogleAI to help build Sparrow, a secure ML platform on @risc_v, #OpenTitan & the @rustlang #KataOS based on the #seL4 microkernel using our #opensource simulator @renodeio. See how we enabled #Rust apps & #GDB debugging for their system @GoogleOSS @seL4Foundation
https://twitter.com/GoogleOSS/status/1580952385291452416
Original tweet : https://twitter.com/antmicro/status/1582021107934105601
#opentitan #KataOS #sel4 #opensource #rust #gdb