@lethalbit @Lunaphied So it is a #PSRAM on a highspeed SPI interface using modern RAM like DDR3 under the package...

Makes total sense, and to be honest I do wish for something like it that can be accessed transparently as a block device [i.e. USB flashdrive] for R/W heavy cases...

Cuz I'm convinced that'll be a better option for the #NeoFloppy when it comes to something faster than flash that isn't going to wear out faster...
https://github.com/KBtechnologies/NeoFloppy

@LunaFoxgirlVT @stman Big #FPGA's can literally emulate a lot of #ISA's like #mc68k|60 or #RISCV but I'm shure they do take some time switching between those and loading the #VHDL code.

Also I'm pretty certain that unless one were to use #PSRAM it's not possible to retain any data in #RAM between those hot reboots.

Not to mention that this assumes equal #Endian|ness...