RISC-V · @risc_v
845 followers · 2789 posts · Server noc.social
RT from Daniel Payne (@Daniel_J_Payne)
RISC-V engineers can do logical ECOs faster using formal technology, see how at this Synopsys webinar with a speaker from SiFive. July 26th, 10-11AM PDT. https://marketingeda.com/event/a-novel-approach-to-implementing-logical-ecos-with-synopsys-formality-eco-on-high-performance-risc-v-cores/ #SemiEDA #SemiWiki
Original tweet: https://twitter.com/Daniel_J_Payne/status/1683590226432901120
RISC-V · @risc_v
668 followers · 2199 posts · Server noc.social
RT from Daniel Payne (@Daniel_J_Payne)
TSMC, Synopsys, proteanTecs, RISC-V and Infineon will be at the GSA 2023 European Executive Forum, 14-15 June, Munich. https://marketingeda.com/event/gsa-2023-european-executive-forum/ #SemiEDA #SemiIP
Original tweet : https://twitter.com/Daniel_J_Payne/status/1635376968026972169
RISC-V · @risc_v
515 followers · 1973 posts · Server noc.social
RT from Semiconductor Engineering (@SemiEngineering)
10 technical papers added this week https://semiengineering.com/chip-industrys-technical-paper-roundup-dec-20/
#RISCV #semiconductor #lowpower #HardwareSecurity #SRAM #graphene #chiplets
@UTAustin @ucsbcs @aalto @AuburnU @FLEETCentre @UMich @ethzurich @ETH_en
#5G #fuzzing #semiEDA
Original tweet : https://twitter.com/SemiEngineering/status/1605238496696094720
#semiEDA #fuzzing #5g #chiplets #graphene #sram #hardwaresecurity #lowpower #semiconductor #riscv
RISC-V · @risc_v
507 followers · 1964 posts · Server noc.social
RT from Semiconductor Engineering (@SemiEngineering)
Week In Review: Design, Low Power https://semiengineering.com/week-in-review-design-low-power-225/
#semiEDA #RISCV #verification #embedded #cybersecurity #GPNPU @quadric_io @Codasip #fusion #lowpower #semiconductor
Original tweet : https://twitter.com/SemiEngineering/status/1604701031308222464
#semiconductor #lowpower #fusion #gpnpu #cybersecurity #embedded #verification #riscv #semiEDA
RISC-V · @risc_v
311 followers · 1662 posts · Server noc.social
RT from Daniel Payne (@Daniel_J_Payne)
The SemIsrael Tech Webinar for September 13th is being planned, at least Imperas is presenting on RISC-V processor verification. More speakers to be added. https://marketingeda.com/event/semisrael-tech-webinar-3/ #SemiEDA #SemiIP
Original tweet : https://twitter.com/Daniel_J_Payne/status/1555221510301749248
RISC-V · @risc_v
311 followers · 1662 posts · Server noc.social
RT from DesignAndReuse.com (@designreuse)
. @nsitexe Selects @ImperasSoftware ImperasDV for #Automotive Quality #RISCV Processor Functional Design Verification https://www.design-reuse.com/news/52007/nsitexe-imperasdv-automotive-quality-risc-v-processor-functional-design-verification.html #semiEDA
Original tweet : https://twitter.com/designreuse/status/1529111250462023680