The first two primitives from the SER/DESER family are running on the Himbaechel-#gowin architecture today! Without a video about blinking LEDs, I can only say that #TangPrimer20k and #tangnano9k blink properly :) For GW1N-9C, the LED was intentionally attached to the bottom of the chip, where IO needs to be programmed in a special way.
Since ODDR and ODDRC do not use a dedicated clock for IO, this was not very difficult. And now I will deal with very interesting primitives with IO clocks :)

@yrabbit

Congratulations! 🎉️
Once I have a some more free time, I will definitely try ELVDS on #tangnano9k 😃️

Yay! The brave at heart can try emulated differential IO, especially on #tangnano9k, where the HDMI connector is soldered to these very elements🙃

yeah, for now you'll have to apply PR manually😉
#apicla #fpga #sipeed #gowin

https://github.com/YosysHQ/apicula/pull/177

I don't turn #tangnano9k off, it works with the same firmware, but I disconnect the LEDs from #tangnano4k and press the button that is responsible for the OEN signal of the LVDS_IOBUF primitive.

As a result the LEDs on the breadboard are controlled by #tangnano9k

So LVDS_IOBUF: the first video shows the operating mode as INPUT. #Tangnano4k generates the signal, blinks LEDs, and #tangnano9k receives it and blinks its built-in LEDs.

#apicula #sipeed #gowin #fpga

The #tangnano4k generates a signal and sends it through a differential line to the counter-parallel LEDs (way to show that the signal is really differential) and then through two wires the signal gets to TLVDS_IBUF in #tangnano9k and it flashes its standard LED.🙂

It took me all day. getting old🙂
#fpga #apicula #sipeed #gowin

@mole99
yeah, it turned out fast and ELVDS are kind of critical for #Tangnano9k because that's where they are soldered to HDMI. But there is a lot of work ahead: I need to add T/E-lvds IBUF, TBUF and IOBUF, which until now we did not have in #apicula. And after that I also need to connect all serialization/deserialization to the new primitives😉

#tangnano9k flashes the same LEDs but with the ELVDS primitive😀

#gowin #sipeed #apicula #fpga

Moving on to the next chip - the #Tangnano9k board.

The pictures... I'm testing the same primitives and it's already boring for the reader:)

This is the penultimate chip I have, after which I will clean up the code for the intermediate publication.

#fpga #sipeed #gowin #apicula

"Look upon life as thee may look upon the stone, and create thee then thine own order. Look first at a man, and if thee looks rightly, then soon ye shall come full circle. Then look beneath him, and if thee looks rightly, then soon shall thee once again come full circle. Thus may thee divine the puzzle from the pieces." Wizardry VII
In other words, the buttons on the circumference of the statue should be pressed counterclockwise, first the top row and then the bottom row.
#fpga #tangnano9k 🤣

Bingo!😀

#tangnano9k the lower LED starts up with a delay - this is the output of the serializer.