@ariadne Eeyuppp!
There's a reason #Transmeta literally did design their chips to emulate #amd64 & #ix86 with an architecture that isn't an #ISA a OS can even directly utilize.
That being said, I'm confident that #ARM / #ARM64 will be a stepping stone till #RISCV is mature enough to become mainstream (i.e. 20 Years) and cheap $10 #FPGAs allow running one at a performance that is on-par to then current #AppleSilicon SoCs and faster than any current-day #AMD64 can be.
#AppleSilicon #fpgas #riscv #arm64 #ARM #isa #ix86 #amd64 #transmeta
@sataa and another ting:
It showcased #FLOSS superiority because #GCC delivered better and more performant results than #Intel's own compiler.
They should've gone the #Transmeta route and decoupled silicon and code for more efficiency and scalability instead.
https://en.wikipedia.org/wiki/Code_Morphing_Software
https://en.wikipedia.org/wiki/Transmeta_Efficeon
@Tathar @LunaFoxgirlVT and whilst #Transmeta wanted to do hot reboot and parrallel emulation of different ISAs, they never showed any prototypes and aside from press announcements with no estmated dates I could not find anything about it.
That being said, @stman has been working on doing basically a #CPU with an #FPGA and seemed to have looked into #mc68k & #RISCV as ISAs to run this way.
#riscv #mc68k #fpga #cpu #transmeta
@stman @Tathar @LunaFoxgirlVT totally.
Also unlike an #PFGA, #Transmeta did just-in-time low-level interpretation of #ix86 code and translation into it's native code (a very restricted #VLIW256 ISA) that wasn't even possible to run a regular OS due to it's spechalized nature...
https://en.wikipedia.org/wiki/Transmeta#Code_Morphing_Software
#vliw256 #ix86 #transmeta #pfga
So vor mich in gesurft und zack: nächste Idee für einen Talk am @vcfberlin und #VCFe: Transmeta Crusoe und Code Morphing. Wissta noch? #transmeta #vintagecomputing
#vcfe #transmeta #vintagecomputing