GeekProjects News · @news
4 followers · 3116 posts · Server geekprojects.com
Didier Malenfant · @didier
270 followers · 611 posts · Server mastodon.gamedev.place

If you’re using @panic ’s Nova to edit your Verilog files, you'll be happy to know that @tsalvo ‘s Verilog extension now supports linting too via verilator…

nova://extension/?id=com.tomsalvo.verilog&name=Verilog

github.com/tsalvo/Verilog-Nova

#fpga #openfpga #verilog #nova #verilator

Last updated 1 year ago

RISC-V · @risc_v
605 followers · 2039 posts · Server noc.social

RT from Antmicro (@antmicro)

Co-simulate CPUs from RTL in with @renodeio to run unmodified software in a deterministic simulation. Combine precise CPU models w/ reusable I/O components to build complete systems simulating e.g. SoC w/ Ibex @risc_v CPU: antmicro.com/blog/2023/01/cpu-

Original tweet : twitter.com/antmicro/status/16

#opentitan #opensource #verilator

Last updated 2 years ago

GeekProjects News · @news
1 followers · 1727 posts · Server geekprojects.com
IT News · @itnewsbot
2651 followers · 244184 posts · Server schleuss.online

Want To Play With FPGAs? Use Your Pico! - Ever want to play with an FPGA, but don’t have the hardware? Now, if you have one ... - hackaday.com/2022/12/31/want-t

#fpga #rp2040 #pipico #verilog #verilator #emulation #raspberrypi #fpgaemulation #raspberrypipico

Last updated 2 years ago

RISC-V · @risc_v
311 followers · 1662 posts · Server noc.social

RT from fpga_kian (@splinedrive)

If you have no in your hand. just use your @mangopi_sbc to simulate your design with on it. It feels like a real fpga evalboard from form factor. Btw. it's simulate my new one cycle riscv cpu that executes raytracer code.

[Video embedded in original tweet]

Original tweet : twitter.com/splinedrive/status

#fpga #riscv #verilog #verilator #kianRiscV

Last updated 2 years ago

RISC-V · @risc_v
311 followers · 1662 posts · Server noc.social

RT from Antmicro (@antmicro)

At this year's - we will hold a talk on pre-silicon testing of the @GoogleOSS-sponsored @SkyWaterFoundry MPW designs using co-simulation with @renodeio and . Visit esscirc-essderc2022.org/a-year to learn more. @efabless @risc_v @CHIPSAlliance

Original tweet : twitter.com/antmicro/status/15

#ESSDERC #ESSCIRC #verilator

Last updated 2 years ago